If you are like me, the OpAmp in the PSOC5 is occasionally used. I use it for driving signals out from the 8 bit Voltage DAC. (The voltage DAC is the Current DAC feeding into a resistor, so it has a high signal impedance. It can’t drive any resistance that you would typically find in a circuit.)
I have a situation where I want to put positive going and negative going pulses on a line at a low voltage. In the past, I have used a Look Up Table with a voltage DAC and an Opamp. That uses a lot of resources. Here is my typical schematic for this usage:
This schematic is one of a multiple sheet set. You can right click on the schematic title at the bottom of the sheet and rename, delete, or add a new page. The Diamonds are off sheet connectors. The DAC Data is single lines pulled out from a bus to be fed by the Lookup table. The DAC is set up for Data Source being DAC Bus. The design above takes a positive going pulse for (N)egative or (P)ositive signals and feeds the DAC with a value it immediately puts out. The DAC is fast enough to generate 10us Pulses. The 24mhz clock into the LUT2 and DAC allows for everything to be synchronized.
The huge advantage to the above setup is the ability to control the voltage out in small steps.
I finally realized that I could probably use the PSOC’s resistors for its outputs on two analog ports and make a voltage divider. If I fed that voltage divider into the OpAmp, it could be manipulated to provide a 2.5v steady signal with +2.5v pulses and -2.5v pulses if sent through a capacitor.
My first try did not work, as I only chose Analog as the port, with the resistor dividers. I finally realized I could choose both Analog and Digital, and create the design I wanted that way.
To test this out, I took a Cy8CKit-059 board, and used the CE19352 Blinking Led project. (You will see a lot of leftovers from that project in these schematics.) I modified the PWM_1 to have a 1 mhz input click, duplicated it, and then set PWM2 as One Shot with Multi Trigger (under Advanced Tab). The clock on PWM2 is a 15us clock (66,667 hz) to make it easy.
Then pins were then set up. P3 and P3 are dual Digital and Analog pins. A Look Up Table is set up with a 2 in and 2 out, simple truth table. Here is the quick and dirty schematic and some of the component setups.
Less Internal Components Method:
The above setups cause PWM_2 to be triggered some time after PWM_1, so you get a Positive pulse Followed by a Negative Pulse. You can change the CMP and Period values on PWM_2 to move the pulse further out or closer. The pulse pairs repeat about every 65.5 milliseconds.
The Look Up Table is configured like this:
The output from this is fed into a capacitor. The Pulses are inverted going out, due to feeding these pulses into another inverting higher voltage line driver. Swap the IN0 or IN1 to change output polarity without adding components.
The Pins (P3 and P3) are configured as follows:
P3 is as follows:
Notice that both pins are dual analog/digital, Resistor Pull Up and Pull Down, and one is set for High default and the other is set for Low Default. (Those settings allow you to control the OpAmp from software if you don’t use a Hardware connection.)
Once hooked up and running, you can probe the pins and see the following.
As you can see from the Tek scope above, trace 1 (yellow) steady at 2.5v, pulses up for 15us for a negative pulse (3) and down for 15us for a positive pulse (2). This inversion is on purpose and can be fixed with “not” inputs if you add components.
First Try Gotcha, Resistor Trick
My First try was not symmetrical. The voltage was about 0.1 volts off. It turns out the Pull Up Resistors have a slight disadvantage over the Pull Down resistors.
The solution: A 22K ohm Resistor from P3 to 5V on the kit board provided the internal 2.5V dc balance needed. The Resistor offsets the OpAmp also. A voltmeter was used on P3 to verify all the internal offsets were taken care of. Since this is also an “analog” pin, the internal circuitry will see the outside signal modification provided by the resistor.
Note that measuring the voltage on the outside of the PSOC at P3 provides different answers than you see on the P3 output, once all the internal offsets are in play.
One more thing to note. Unlike other development systems, you can name the pins. I have started prepending the P3_5 info in the PSOC so that I know which pin I am dealing with. So, the pin becomes P3_5_signalname. In the Eagle schematic, I use P3 for an unused pin, and P3.5_signalname for a used pin, and the P3.5_signalname matches the name I give to the pin in PSOC Creator (I replace first “.” with an underscore). Of course, you have to assign the pins correctly.
With the pin driven methodology, the LUT is significantly reduced in complexity, the Voltage DAC is no longer needed, and the Output Pulse can be software driven (if the pins are not attached to hardware on the Digital configuration) or driven from logic, as seen in this example.